Waymo has published its first substantive public account of the compute stack that runs the Waymo Driver, and the centerpiece is a purpose-built 5-nanometer ASIC that Waymo designed itself. The chip is not a general-purpose accelerator. It is a front-end sensor processor: specialized blocks pull structure out of raw lidar, radar and camera streams, including temporal denoising that Waymo credits for low-light perception, and hand the result to a purpose-built inference engine running sensor-fusion models that span sparse convolutions through dense transformers. The ASICs alone contribute more than 1,000 TOPS of machine-learning performance dedicated purely to front-end processing, though the post by VP of Engineering Satish Jeyachandran and the company's compute lead is careful to argue that achieved performance in the low-batch regime the car actually operates in matters far more than peak numbers.
The architecture Waymo describes is machine-learning-primary and heterogeneous. Custom silicon carries the sensor front end while CPUs, GPUs and other accelerators handle orchestration, data movement and logging. Total onboard compute has scaled roughly twentyfold in eight years. The system currently ingests thirteen high-resolution cameras simultaneously in real time, and it is built as two independent engines running full parallel workloads so either can take over if the other faults, because there is no human backup to fall back on. Physical constraints shape the design as much as the math does: the compute integrates with the vehicle's liquid cooling loop and has to survive vibration, shock and temperature extremes while running from the car's battery. Waymo names AMD, Micron, NVIDIA, Samsung, Sandisk, Socionext and TSMC as partners and points to talks at Hot Chips for more detail. The design draws on more than 200 million fully autonomous miles of operational data.
Semafor picked the story up the same day and framed it as the first time the Alphabet-owned company has opened up about the brain behind the driverless system, emphasizing the packaging problem over the silicon specifications: all of that compute has to fit in the trunk of a car and run off the vehicle battery. J.D. Capelouto extends the point to humanoid robots, whose onboard compute will have to be considerably more compact than a Waymo's while operating in stores, homes, factories and hospitals, environments that are arguably less predictable than city streets.
The disclosure matters for reasons beyond the robotaxi business. Waymo is effectively arguing that at this stage of autonomy the binding constraint has moved from the perception models to the fixed-power, fixed-thermal-envelope hardware those models run on, and that the way to buy headroom is to co-design the accelerator with the sensor suite rather than buy general-purpose parts. That is the logic that produced the TPU, applied to a much harsher deployment envelope. Waymo does not publish wattage, cost, die size or unit volumes, so the efficiency claim cannot be independently checked from what has been released.
- Waymo's own post leads with the ML-primary architecture and the dual-engine fault-tolerance requirement, framing redundancy as non-negotiable absent a human backup.
- Semafor skips the silicon specifications entirely and treats the story as a packaging and power problem, extending it to humanoid robots as the harder version of the same constraint.